How To Set Value Of Register To 0 Assembly Language
Assembly - Registers
Processor operations mostly involve processing data. This data can be stored in memory and accessed from thereon. Nevertheless, reading information from and storing information into memory slows down the processor, as it involves complicated processes of sending the data request across the command charabanc and into the retention storage unit and getting the data through the same aqueduct.
To speed up the processor operations, the processor includes some internal memory storage locations, called registers.
The registers store data elements for processing without having to access the retentiveness. A limited number of registers are congenital into the processor chip.
Processor Registers
At that place are ten 32-bit and half dozen sixteen-bit processor registers in IA-32 architecture. The registers are grouped into three categories −
- General registers,
- Command registers, and
- Segment registers.
The general registers are further divided into the following groups −
- Data registers,
- Arrow registers, and
- Index registers.
Data Registers
Iv 32-bit data registers are used for arithmetic, logical, and other operations. These 32-bit registers can exist used in three means −
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As complete 32-scrap data registers: EAX, EBX, ECX, EDX.
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Lower halves of the 32-bit registers can exist used as 4 16-bit data registers: AX, BX, CX and DX.
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Lower and college halves of the above-mentioned four 16-bit registers tin can exist used as eight viii-fleck data registers: AH, AL, BH, BL, CH, CL, DH, and DL.
Some of these data registers take specific utilise in arithmetical operations.
AX is the primary accumulator; information technology is used in input/output and most arithmetic instructions. For instance, in multiplication performance, one operand is stored in EAX or AX or AL register according to the size of the operand.
BX is known as the base of operations register, as information technology could be used in indexed addressing.
CX is known every bit the count register, as the ECX, CX registers store the loop count in iterative operations.
DX is known as the information register. Information technology is besides used in input/output operations. It is also used with AX register forth with DX for multiply and dissever operations involving large values.
Pointer Registers
The pointer registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-flake right portions IP, SP, and BP. There are three categories of arrow registers −
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Education Pointer (IP) − The 16-bit IP annals stores the offset accost of the next instruction to be executed. IP in association with the CS register (every bit CS:IP) gives the complete address of the current instruction in the code segment.
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Stack Arrow (SP) − The 16-fleck SP register provides the kickoff value within the program stack. SP in association with the SS annals (SS:SP) refers to be current position of data or address inside the programme stack.
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Base of operations Pointer (BP) − The 16-bit BP register mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP can too exist combined with DI and SI equally base register for special addressing.
Index Registers
The 32-chip index registers, ESI and EDI, and their 16-chip rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. There are two sets of index pointers −
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Source Index (SI) − It is used equally source index for string operations.
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Destination Alphabetize (DI) − It is used as destination index for string operations.
Command Registers
The 32-bit instruction pointer register and the 32-bit flags register combined are considered every bit the control registers.
Many instructions involve comparisons and mathematical calculations and change the status of the flags and some other conditional instructions test the value of these status flags to take the command menstruum to other location.
The mutual flag bits are:
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Overflow Flag (OF) − It indicates the overflow of a high-order bit (leftmost chip) of data afterwards a signed arithmetic operation.
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Direction Flag (DF) − It determines left or right direction for moving or comparison string data. When the DF value is 0, the string functioning takes left-to-right direction and when the value is ready to 1, the string operation takes right-to-left management.
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Interrupt Flag (IF) − Information technology determines whether the external interrupts like keyboard entry, etc., are to be ignored or candy. Information technology disables the external interrupt when the value is 0 and enables interrupts when set to i.
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Trap Flag (TF) − It allows setting the operation of the processor in unmarried-step mode. The DEBUG plan we used sets the trap flag, so we could step through the execution i instruction at a time.
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Sign Flag (SF) − Information technology shows the sign of the result of an arithmetic operation. This flag is set up according to the sign of a data item following the arithmetic performance. The sign is indicated by the loftier-club of leftmost bit. A positive result clears the value of SF to 0 and negative effect sets it to 1.
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Zero Flag (ZF) − It indicates the consequence of an arithmetic or comparison functioning. A nonzero consequence clears the zilch flag to 0, and a aught consequence sets information technology to 1.
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Auxiliary Carry Flag (AF) − It contains the conduct from chip three to bit 4 following an arithmetic operation; used for specialized arithmetics. The AF is set up when a i-byte arithmetics performance causes a deport from bit iii into bit 4.
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Parity Flag (PF) − It indicates the total number of 1-bits in the event obtained from an arithmetic operation. An even number of 1-bits clears the parity flag to 0 and an odd number of i-$.25 sets the parity flag to 1.
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Carry Flag (CF) − It contains the carry of 0 or 1 from a high-order bit (leftmost) after an arithmetic operation. It also stores the contents of last bit of a shift or rotate functioning.
The following table indicates the position of flag bits in the 16-bit Flags register:
Flag: | O | D | I | T | S | Z | A | P | C | |||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Scrap no: | 15 | 14 | 13 | 12 | 11 | 10 | nine | 8 | 7 | half-dozen | 5 | iv | 3 | 2 | 1 | 0 |
Segment Registers
Segments are specific areas defined in a program for containing data, code and stack. In that location are three main segments −
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Code Segment − It contains all the instructions to be executed. A xvi-bit Lawmaking Segment register or CS register stores the starting address of the lawmaking segment.
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Data Segment − It contains data, constants and work areas. A 16-flake Data Segment annals or DS annals stores the starting address of the data segment.
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Stack Segment − It contains data and return addresses of procedures or subroutines. It is implemented as a 'stack' data structure. The Stack Segment register or SS annals stores the starting address of the stack.
Apart from the DS, CS and SS registers, there are other actress segment registers - ES (extra segment), FS and GS, which provide boosted segments for storing data.
In assembly programming, a programme needs to admission the retentiveness locations. All retention locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by 16 or hexadecimal 10. So, the rightmost hex digit in all such retentiveness addresses is 0, which is not generally stored in the segment registers.
The segment registers stores the starting addresses of a segment. To get the exact location of data or instruction within a segment, an start value (or deportation) is required. To reference any memory location in a segment, the processor combines the segment address in the segment register with the kickoff value of the location.
Example
Look at the following simple program to understand the apply of registers in assembly programming. This program displays ix stars on the screen along with a elementary message −
section .text global _start ;must be alleged for linker (gcc) _start: ;tell linker entry point mov edx,len ;message length mov ecx,msg ;message to write mov ebx,1 ;file descriptor (stdout) mov eax,iv ;arrangement phone call number (sys_write) int 0x80 ;call kernel mov edx,9 ;message length mov ecx,s2 ;message to write mov ebx,1 ;file descriptor (stdout) mov eax,4 ;organization phone call number (sys_write) int 0x80 ;call kernel mov eax,1 ;organization telephone call number (sys_exit) int 0x80 ;call kernel section .data msg db 'Displaying nine stars',0xa ;a message len equ $ - msg ;length of message s2 times nine db '*'
When the above code is compiled and executed, it produces the following result −
Displaying 9 stars *********
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